Structured Control - Expression Syntax
When using the DBloop, If, Repeat, and While structured control statements, the programmer must include an expression that specifies the condition to test. The EASy68k assembler accepts three different types of expressions: Condition Only, Relational and Compound. All of the conditional expressions use conditional tests which are formed by enclosing a two-letter condition inside angle brackets <>. See Valid Condition Codes below for a complete list of supported conditions.
=== Condition Only ===
The Condition Only expression uses only a conditional test. With the Condition Only expression the assembler will insert a single branch instruction to accomplish the desired logical result. For example, the code:
IF <EQ> THEN
code
ENDI
simply checks the Z bit of the CCR and runs code if Z is set. The code created by the assembler can be seen in the assembler created .L68 file by checking the option "Structured Expanded" under the menu Options/Assembler Options or using the assembler directive "OPT SEX". The IF statement would create code that looks similar to the following:
IF <EQ> THEN
BNE .00000000
code
ENDI
.00000000
The assembler has inserted the BNE .00000000 instruction and the matching .00000000 label so the code inside the IF statement will only execute when the <EQ> condition is TRUE.
===Relational Expressions===
The Relational Expression consists of two operands and a conditional test. These operands and the conditional test are combined in the form:
op1 <xx> op2
In this form, the expression is translated to the following when assembled:
CMP op1,op2
Bxx .LABEL
Only operands that are valid in a CMP instruction may be used but the order is not important. The assembler will arrange the operands as needed to create a valid CMP/Bxx instruction sequence. The various compare instructions and their legal addressing modes are listed below in Table1. The assembler will attempt to create a valid CMP/Bxx instruction sequence to implement the logic of the specified expression. For example, the expressions:
if D1 <gt> #5 then or if #5 <lt> D1 then
both create the compare/branch sequence:
CMP #5,D1
BLE .label
The assembler will generate an error if the operands provided may not be arranged to construct a valid CMP instruction, as listed in Table1.
===Compound Expressions===
All of the structured statements except for DBloop may use compound expressions. Compound expressions are made up of two relational expressions joined by a logical operator (AND or OR). Each relational expression is evaluated to be true or false and then is AND-ed or OR-ed to the other. If the result of the compound expression may be determined after the first relational expression is evaluated then the second expression is not evaluated. This is sometimes referred to as "Short-Circuit" evaluation.
A size may be specified for each relational expression making up a compound expression. To do this, append the size of the first relational expression on the directive; the second relational expression's size is appended on the logical operator. For example the code:
IF.W D3 <GT> NUMBER OR.L (A2) <eq> D7 THEN
causes the first comparison to be a word and the second to be a long word.
Compare Instructions and their Legal Addressing
Modes
Instruction
First
Operand
Second Operand
-------------------------------------------------------
CMP |
(All) | Dn
CMP | Dn | (All)2
CMPA |
(All) | An
CMPA
| An
| (All)2
CMPI | Immediate |
(Data alterable)1
CMPI |(Data alterable)1 |
Immediate2
CMPM
| (An)+ |
(An)+
-------------------------------------------------------
(Table1)
The expression consists of a two-letter condition code enclosed in angle brackets <cc>. The condition codes are the same as those used in the Bcc instruction. The following condition codes may be used:
<CC> Carry Clear
<CS> Carry Set
<EQ> Equal
<GE> Greater or Equal
<GT> Greater Than
<HI> Higher (Unsigned Comparison)
<HS> Higher or Same (Unsigned Comparison)
<LE> Less than or Equal
<LO> Lower (Unsigned Comparison)
<LS> Lower or Same (Unsigned Comparison)
<LT> Less Than
<MI> Minus
<NE> Not Equal
<PL> Plus
<VC> Overflow Clear
<VS> Overflow Set
Special case
<T> True (Used with While statement to
create an infinite loop)
<F> False (May be used in
Unless statement to force use of DBRA.)
1Data alterable - The operand must be an alterable memory location or register.
2This addressing mode is only supported within structured control expressions. The assembler will rearrange the order of the operands to create a legal addressing mode.