Sim68K - Exception Processing

Exception processing can begin in several different ways.
Generally, there are three classes of exception conditions:

    Group 0: Reset, Address error, Bus error.
    Group 1: Trace, Interrupt, Illegal, Privilege violation.
    Group 2: TRAP, TRAPV, CHK, and Divide by zero.

A hardware reset may be generated by clicking the "Reset" button in the "Hardware" window.

Address error occurs when an WORD_MASK or long WORD_MASK is written or read from an odd WORD_MASK boundary. i.e. an odd memory address.

Bus error can occur in this simulator by attempting to read or write outside of the virtual memory space. The virtual memory for this simulator is from location 0 to location FFFFFF (hex).

Interrupt occurs when an external device interrupts the processor's operation. Interrupts may be created manually or automatically from the "Hardware" window..

Illegal exception occurs when an illegal instruction opcode is executed. It also occurs when the ILLEGAL instruction is executed.

Privilege violation occurs when a privileged instruction is attempted and the supervisor bit in the status register is not set.

TRAP exception occurs when a TRAP instruction is executed

TRAPV exception occurs when a TRAPV instruction is executed

CHK exception occurs when a CHK instruction is executed

Divide by zero exception occurs when a DIVU or DIVS instruction attempts a division by zero.

Exception processing begins by creating the appropriate exception stack frame for the particular exception group on the supervisor stack. Then, the supervisor mode is turned on and trace mode is turned off. After that, instruction execution resumes at the location referenced by the appropriate exception vector. The exception vector locations that can be used in this simulator are listed below:

Address
(Hex)       Assignment            
 000     Reset: Initial SSP
 004     Reset: Initial PC
 008     Bus error
 00C     Address error
 010     Illegal instruction
 014     Divide by zero
 018     CHK instruction
 01C     TRAPV instruction
 020     Privilege violation
 024     Trace
 028     Line 1010 emulator
 02C     Line 1111 emulator
 064     Level 1 Interrupt
 068     Level 2 Interrupt
 06C     Level 3 Interrupt
 070     Level 4 Interrupt
 074     Level 5 Interrupt
 078     Level 6 Interrupt
 07C     Level 7 Interrupt
 080-0BC TRAP instruction vectors

When the simulator starts up the supervisor bit is set on and the supervisor stack pointer is set to the value 1000000 (hex). Note that the stack grows downward, so the stack frame for any exceptions will grow from $1000000 downward.