DIVS Instruction

DIVide Signed. The instruction divides a signed (two complement) data register with an operand specified as an effective address. The data register is 32 bit and the effective address is a word. The result is stored in the lower 16 bits of the data register and the remainder in the upper 16 bits. Two errors can arise with DIVS:

1. If you try to divide with 0 an interrupt will occur.

2. If the result doesn't fit in 16 bits the data register will remain unchanged
and the V-flag will be set (overflows).

ADDRESS METHODS:

Dn, (An), (An)+, -(An), x(An), x(An,xr.s), x.w, x.l, x(PC), x(PC,xr.s), #x

DATA LENGTH: Word

FLAGS:	X - U
	N - S, undef if overflow
	Z - S, undef if overflow
	C - 0
	V - S

SYNTAX: DIVS <ea>,Dn

EXAMPLE CODE:

DIVS #4,D0 if D0 contained 9, D0 would now contain 00010002, 1 remainder, 2 from division