The first instruction held in EPROM at Hex 0000 is an unconditional branch into a high order copy of the EPROM (Typically address Hex F00010). Execution continues with a Write instruction (to no particular address) and this causes the address decoding logic to switch out low order copies of the EPROMs and enable the RAM. Address map during boot: 000000 1 instruction F00000 normal base address of eprom Address map after boot: 000000-3FFFFF RAM 400000-7FFFFF Reserved for RAM Expansion 800000-EFFFFF Reserved for I/O expansion F00000-F3FFFF 32k EPROM F90000 Configuration switches FFFE00-FFFE3F 32201 interrupt control unit FFFFF0 TUBE R1Status FFFFF2 TUBE R1Data FFFFF4 TUBE R2Status FFFFF6 TUBE R2Data FFFFF8 TUBE R3Status FFFFFA TUBE R3Data FFFFFC TUBE R4Status FFFFFE TUBE R4Data ---[Interrupts & Traps]--- # INTBASE Offset Abbrev. Description 0 0000 NVI Non-vectored interrupt 1 0004 NMI Non-maskable interrupt 2 0008 ABT Abort 3 000C SLAVE Slave processor trap 4 0010 ILL Illegal operand trap 5 0014 SVC Supervisor call trap 6 0018 DVZ Divide by zero 7 001C FLG Flag trap 8 0020 BPT Breakpoint trap 9 0024 TRC Trace trap 10 0028 UND Undefined instruction trap 11 002C Reserved 12 0030 Reserved 13 0034 Reserved 14 0038 Reserved 15 003C Reserved 16 0040 Vectored interrupts Interrupt pointer = 32 bits: ----------------------------------- | 16 bits offset | 16 bits module | ----------------------------------- (MOD register+(16 bits module))+16 bits offset=interrupt handler Return from trap: RETT Return from interrupt: RETI ---[Pandora-v2.00]--- 0312 D4 45 06 ÔE. MOVB &06(R0),TOS ; Get ROM type 0315 E8 A5 0D è¥. ANDB &0D,TOS ; Get CPU bits 0318 C4 A5 09 Ä¥. CMPB &09,TOS ; Is it 32016? 031B 1A 18 .. BNE &00000333 ; Not 32016, jump to error ---[Pandora-v2.00]--- ---[Bas32]--- L ;Moan f not 001FCD 02 B6 E5 3838 BSR CALCINTEXT ;See if now within the text 001FD0 9A A8 38 3839 BFC CONTROL ;Moan if not in text 001FD3 F4 A6 01 A3 B9 3840 TBITB =1,INTEXT 001FD8 8A A8 30 3841 BFS CONTROL ;Moan if in line number 001FDB D7 2D 3842 MOVD R5,TOS 001FDD 0 BE DC 3843 BSR TRANSSUB ;Do the actual transfer 001FE0 EA 1D 3844 BR DELBLOCK10 ;Then the delete 3845 ; 3846 ; ======== 3847 ; DELBLOCK 3848 ; ======== 3849 ; 3850 ; Delete an entire marked block 3851 ; 3852 ; ENTRY:- No conditions 3853 ; 3854 ; EXIT:- To ILOOP 3855 ; 001FE2 ---[Bas32]--- ---[Pandora-v0.61]---http://beebwiki.jonripley.com/Reading_command_line 40c: 17 50 00 movd 0(r2), r0 40f: 74 a5 07 74 tbitb $7, @0xffffffffffffffee 413: 9a 7c bfc 0x40f 415: 14 aa 76 00 movb @0xfffffffffffffff0, 0(r0) 419: 8f 00 addqd 1, r0 41b: 04 a2 0d 7f cmpb $13, -1(r0) 41f: 1a 70 bne 0x40f 421: d7 00 movd r0, r3 423: e3 50 00 subd 0(r2), r3 426: 8f 1f addqd -1, r3 428: 7c a1 20 bicpsrb $32 42b: 12 00 ret 0 ---[Pandora-v0.61]--- ---[Pandora-v2.00]---http://beebwiki.jonripley.com/Reading_command_line a36: 17 50 00 movd 0(r2), r0 a39: 1c a8 74 cmpqb 0, @0xffffffffffffffee a3c: 7a 7d ble 0xa39 a3e: 14 aa 76 00 movb @0xfffffffffffffff0, 0(r0) a42: 8f 00 addqd 1, r0 a44: 04 a2 0d 7f cmpb $13, -1(r0) a48: 1a 71 bne 0xa39 a4a: 5f d0 14 movqd 0, 20(sb) a4d: d7 00 movd r0, r3 a4f: e3 50 00 subd 0(r2), r3 ---[Pandora-v2.00]--- Instructions: ============= lpr[bwd] ; Load Processor Register (intbase and entire psr is privileged) ; bit 0(C): Carry-flag ; bit 1(T): Trap-flag ; bit 2(L): Low-flag ; bit 3-4 : reserved ; bit 5(F): F-Flag ; bit 6(Z): Zero-flag ; bit 7(N): Negative ; bit 8(U): User mode 0=Supervisor mode, 1=User mode (privileged) ; bit 9(S): Stack-flag 0=Interrupt Stack Pointer (SP0), 1=User Stack Pointer (SP1) (privileged) ; bit 10(P): Trace trap pending-flag (privileged) ; bit 11(I): Interrupt enable flag 0=disable maskable interrupts, 1=enable maskable interrupts (privileged) ; bit 12-15: reserved (privileged) bicpsr[bdw] ; Bit clear in PSR (word is privileged) bispsr[bdw] ; Bit set in PSR (word is privileged) setcfg [cmfi] ; Set CFG register (privileged) ; bit 0(I): 0=Interrupt vectoring disabled, 1=Interrupt vectoring enabled ; bit 1(F): 0=Floating point instruction set disabled, 1=Floating point instruction set enabled ; bit 2(M): 0=Memory Management Instruction set disabled, 1=Memory Management Instruction set enabled ; bit 3(C): 0=Custom instruction set disabled, 1=Custom instruction set enabled rett ; Return from trap (privileged) reti ; Return from interrupt (privileged) lmr ; Load memory management register (privileged) smr ; Save memory management register (privileged) movsu[bwd] ; Move value from Supervisor to User space (privileged) movus[bwd] ; Move value from User to Supervisor space (privileged) rdval ; Validate address for reading (privileged) wrval ; Validate address for writing (privileged) bic[bwd] ; Bit clear ash[bwd] ; Arithmetic shift lsh[bwd] ; Logic shift rot[bwd] ; Rotate tbit[bwd] offset, base ; Test bit (copy bit to F-flag) cbit[bwd] ; Clear bit (test bit and then clear bit) sbit[bwd] ; Set bit (test bit and then set bit) ibit[bwd] ; Invert bit (test bit and then invert bit) ffs[bwd] ; Find first set bit cvtp ; Convert to bit pointer movs[bwd] ; Move string (r0 elements from r1 to r2) ; bit 0(T): translation (r3=translation table) ; bit 1(B): backwards ; bit 2-3(WU): 01: while match (r4=termination match) ; 11: until match (r4=termination match) cmps[bwd] [options] ; Compare string (r0 elements from r1 to r2) movm[bwd] ; Move multiple cmpm[bwd] ; Compare multiple acb[bwd] ; Add, compare and branch case[bwd] ; Case branch addr ; Calculate effective address lxpd ; Load external procedure descriptor wait ; Wait for interrupt dia ; Diagnose Registers: ========== tos = top of stack (move byte/word/dword to stack) OS calls ========== http://beebwiki.jonripley.com/API: OS_WRCH (SVC &01) Write character to currently selected output stream On entry: R1(B)=character to be written On exit: F bit clear always. All registers unchanged. OS_STRING (SVC &02) Write string to currently selected output stream On entry: R1(D) is a pointer to a string of characters. R2(D) is length. On exit: F bit clear always. All registers unchanged. OS_ASCI (SVC &03) On entry: R1(B)=character to be written On exit: F bit clear always. All registers unchanged. OSNEWL (SVC &04) Write new line On entry: no entry parameters On exit: F bit clear always. All registers unchanged. OSRDCH (SVC &05) OSBYTE (SVC &06) On entry: R0 is OSBYTE function code R1 is first parameter R2 is second parameter Carry On exit: R0 preserved, unless &83 or &84 R1 is return value R2 is returned if R0(B)>&7F Carry is returned if R0(B)>&7F OSWORD (SVC &07) On entry: R0 is OSWORD function code R1 is pointer to control block On exit: undefined, control block updated OSCLI (SVC &08) OSFILE (SVC &0A) On entry: R0 is OSFILE function code R1 is pointer to filename R2 is load address R3 is exec address R4 is start address R5 is end address or attributes OSFIND (SVC &0B) OSARGS (SVC &0C) OSBGET (SVC &0D) OSBPUT (SVC &0E) OSGBPB (SVC &0F) QUIT (SVC &11) OS_FILE (SVC &13) OS_IMMEDIATE (SVC &15) Output an inline string with effect as OS_STRING. On entry: eelco@Zaonce:/usr/local/bin$ ./objdump -b binary -D -m ns32k /home/eelco/Pandora-v0.61.rom > /home/eelco/Pandora-v0.61.asm eelco@Zaonce:/usr/local/bin$ ./objdump -b binary -D -m ns32k /home/eelco/Pandora-v2.00.rom > /home/eelco/Pandora-v2.00.asm Pandora error codes: ================================================== 100 256 File not found 101 257 Can't use OS_PRIV from user mode TK_privilege called from user 102 258 Can't use OS_PRIV on OS_PRIV Attempt to modify privilege of TK_privilege 103 259 Can't use OS_PRIV on unknown SVC Unknown SVC reference by TK_privilege 104 260 LOAD/RUN disabled Illegal load attempt by TK_OSCLI 105 261 Illegal event number illegal event number 106 262 Not a 32016 image 11B 283 Escape (incorrect) 1FE 510 End of file (incorrect) 1FF 511 Key timeout (incorrect)