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8-Bit IDE Convertor
Download associated zip file 185K
This zipped file contains the software mentioned in this article, plus the following text


The Author is a retired design engineer of both Hardware and software systems having spent 17 years with IBM at their Havant disk drive manufacturing plant. Principal role: the design of test equipment for multiple drive testing. He designed a simple interface to expand the IDE interface to run 16 drives from 1 IDE port and wrote the device driver required. Now spends his time Freelance engineering and has a part time job in the water industry.
 

8-bit IDE convertor Technical description.

 Schematic overview

 IDE (integrated Drive Electronics) This type of disk drive contains it's own on-board controller, and is intended to appear almost as a "chip" Essentially it is bus compatible requiring only a set of buffer chips plus an address decoder.

 Signal pins AT THE DRIVE.

 16 bit data bus 2 chip select pins 3 address lines 2 (read & write) control pins 1 interrupt line. 5 advanced control pins (of no concern to us here). 1 (LOW POWER) LED drive pin (DASP Drive ACTIVE)

 Signal pins AT the PC INTERFACE.

 8 bits of data 1 IORQ signal 2 control pins (-RD & -WR) 4 ADDRESS lines.

 The system occupies 16 bytes of IO (or memory in Motorola 6X systems) Since the author has produced circuits (thus far) for Intel & Zilog Microprocessors this description relates to the interface being used with a Z80 processor (speed unimportant).

 OK, the first thing to do here is to convert the 16 bit data bus of the drive to 8 bits for the interface (Yes that is where the 4th address line comes in). I have chosen to use here an ALS652 chip which is a bidirectional Latch, with tristate. The overview here is that to write to the disk the UPPER 8 bits of the data are written to the interface which clocks the data into the A bus pins of the 652. The second part of the write (Lower 8 bits) presents data to the lower 8 bits of the IDE drive BUT the write signal is also used to gate the data (previously written to the 652) to its output pins (the upper 8 bits of the Drive bus). To summarise then, 2 8 bit writes UPPER FIRST LOWER SECOND present all data to the drive.

 The 4 operations are:

 Write High data: Latches a byte into the 652 from data bus. Read high data: Gates current 652 data onto data bus. Write Low data: Enable 'B' bus data to drive AND write drive Read Low data: Read low data AND clock Hi data INTO 652 'B'

 (See manufacturers data for a full description of 652 A & B bus).

 Decoding:

 In the Author's system the IO bus is used ONLY for the IDE bus so it effectively is 'imaged' 16 times. If you wish to exclusively use only 16 bytes of IO then you will need to fully decode it, provision of which is made in U2A pin 3 Drive this can effectively be used as a -CS pin. To use this in a memory mapped system Ground the pin marked -IORQ and again fully decode the 16 byte "page" and apply to pin 3 of U2A.

 Chip choice:

 Those of you familiar with TTL will note that U2B is used only as an inverter, those of you with even more experience will know it is to keep the chip count down!. The 2x LS32 & 1,LS139 can be easily replaced by a PAL22V10 (programmable chip, the author's choice) BUT you will need to program this chip. If anybody requires the PLD/JED file I can provide it).

 NOTES; 1/ The XTnnn spec specifies the drive to interface cable should be kept less than 50cm total length (for those that do not think 25 years is enough to convert from imperial to metric that's about 19 inches). 2/ Although the circuit does not show them there is a 0.1uF cap (decoupler) across each chip's supply pins. 3/ Remember to use ESD precautions and Don't solder on LIVE equipment. 4/ This information, the interface described and the software provided IS (C) Copyright Bill Cooper 1994, 1998. However I am happy to make it public domain for use by individuals in a NON-PROFIT application. Anybody wishing to use this information in a business/industrial or profit making application MUST seek the written permission of the Author.

 Disk preparation:

 When you "format" an IDE disk on a PC you are not actually doing anything other than a READ command without a data transfer occurring. In the old days to format a disk meant laying down patterns on the disk which included areas for data storage. Today ALL hard disks are factory formatted on very special equipment. When you "format" a hard disk all that happens is that the onboard controller reads a section of the disk, loads the data into its OWN buffer and does an ECC check on the data (The ECC is merely a key written on 8 bytes and is an XOR of the data for that sector) IF the rolling ECC check does not match the written ECC then an error occurs. If you want to write a format routine for this application then use the VERF command, as you see in the software it does not transfer data at all.

 I use a 2 byte key signature to identify that a drive has data on it i.e. the letters BC as the first two bytes, IF these two bytes are present then the drive will "boot" i.e. the first 48 sectors are loaded into the PC and control is passed to the 4th byte. To prepare a disk all I need to do is to write the following code

 DB "BC" Drive recognition bytes NOP  Pad NOP  Pad JMP 0 Restart the computer. (prevent lockup)

 To do this you can manually put these few bytes somewhere in memory then load all the IDE regs (as in HD_INIT) but call write sector which will then put this data onto the chosen sector.

 GOODIES:

 The IDENT command will load the disk parameters from the drive's "hidden area" this is 512 bytes of data containing the technical specification of the drive. Details such as Number of (logical) Heads, cylinders and tracks, Manufacturers name, type SERIAL number PIO mode and all sorts of data.

 Here are some you may find useful:
 
 IDENTIFY DRIVE INFORMATION (1)
  Word
 0  General configuration bit-significant information
  1  Number of cylinders
  2  reserved
  3  Number of heads
  4  Number of unformatted bytes per track
  5  Number of unformatted bytes per sector
  6  Number of sectors per track
  7-9  Vendor Unique
  10-19  Serial number (20 ASCII characters, 0000h=not specified)
  20  Buffer type
  21  Buffer size in 512 byte increments (0000h=not specified)
  22  # of ECC bytes avail on Read/Write Long cmds (0000h=not spec'd)
  23-26  Firmware revision (8 ASCII characters, 0000h=not specified)
  27-46  Model number (40 ASCII characters, 0000h=not specified)
  47-255 Further extensive drive data (of no concern to us here)

N.B.: It is from this table that the BIOS in your big PC can auto-configure the hard drive(s)
 

Software:

The software is written for the Z80 micro.

The BASE address is the I/O address "page" address and MUST be a multiple of 10hex.

The example of software provided is happily running in an old Sharp MZ-80K running a 504 Mb LAPTOP ide drive (Lap top IDE drives are smaller and require only + 5 volts).



  FILES Contained in the zipped file (Download now) 185K

SHARPIDE.SCH    This is an orcad schematic (Version 3)
Sharp.LIB                This is an orcad LIBRARY file containing the IDE macro components
WIRELIST.txt        This is a wiring file (to verify the BMP file)
JS.MAC                  This contains low level Z80 code for the IDE Interface.
Z80IDE.txt              This file contains notes on the interface plus a limited technical description.
IDE.bmp                  Large bitmap containing a wiring diagram


Wiring Check List (Excluding supplies).
 Micro INTERFACE CONNECTIONS:

  -RD   to pin 1  U1 LS32
  -WR   to pin 12 U1 LS32

  -IORQ to PIN  2 U1 LS32
           PIN 13 U1 LS32
           PIN  1 U2 LS139
           PIN 37 P2 IDE Connector

   A0   to PIN 35 P2 IDE Connector
   A1   to PIN 33 P2 IDE Connector
   A2   to PIN 36 P2 IDE Connector
   A3   to PIN  2 U2 LS139
 
   D0   to PIN 4  U7 74ALS652, PIN 17 IDE CONNECTOR
   D1   to PIN 5  U7 74ALS652, PIN 15 IDE CONNECTOR
   D2   to PIN 6  U7 74ALS652, PIN 13 IDE CONNECTOR
   D3   to PIN 7  U7 74ALS652, PIN 11 IDE CONNECTOR
   D4   to PIN 8  U7 74ALS652, PIN  9 IDE CONNECTOR
   D5   to PIN 9  U7 74ALS652, PIN  7 IDE CONNECTOR
   D6   to PIN 10 U7 74ALS652, PIN  5 IDE CONNECTOR
   D7   to PIN 11 U7 74ALS652, PIN  3 IDE CONNECTOR

 
CHIP-CHIP INTERNAL CONNECTIONS:  (NOTE THERE ARE TWO LS32's!!!)

   PIN  3 U1 (LS32)  to PIN 4 U1 (LS32), PIN 10 U3 (LS32), PIN 25 IDE CONN
   PIN 11 U1 (LS32)  to PIN 2 U3 (LS32), PIN  5 U3 (LS32), PIN 23 IDE CONN
   PIN  4 U2 (LS139) to PIN 1 U3 (LS32), PIN  9 U3 (LS32)
   PIN  5 U2 (LS139) to PIN 5 U1 (LS32), PIN  4 U3 (LS32)
 
   PIN  6 U1 (LS139) to PIN 14 U2 (LS139)
   GROUND Pin 3 U2 (LS139) Separately  or use as Chip select see DOCS.
   GROUND Pin 13 U2 (LS139), Pin 15 U2 (LS139)

   PIN 11 U2 (LS139) to PIN 21 U7 ALS652
   PIN  3 U3 (LS139) to PIN  3 U7 ALS652
   PIN  6 U3 (LS139) to PIN  1 U7 ALS652
   PIN  8 U3 (LS139) to PIN 23 U7 ALS652

   Vcc (5V) to PINs  2 & 22 of U7 ALS652

   Connect pins 02,22,24,26,30,40 & 19 of IDE connector to GROUND

   Connect pin2 38  IDE connector to Vcc VIA 1K ohm resistor.

   NOTE Pin 1 IDE is -RESET use this with system RESET OR connect to VCC via 1K ohm resistor.

 
   HIGH DATA BUS (ALS652) to IDE connector:

   PIN 20 U7 74ALS652 to PIN  4 IDE    (Data bit 8)
   PIN 19 U7 74ALS652 to PIN  6 IDE
   PIN 18 U7 74ALS652 to PIN  8 IDE
   PIN 17 U7 74ALS652 to PIN 10 IDE
   PIN 16 U7 74ALS652 to PIN 12 IDE
   PIN 15 U7 74ALS652 to PIN 14 IDE
   PIN 14 U7 74ALS652 to PIN 16 IDE
   PIN 13 U7 74ALS652 to PIN 18 IDE    (Data bit 15)

 NOTE:   If you wish to have a hardware cable interlock, use PIN 40 of the IDE cable (no NOT connect to ground but vcc via 10Kohm and take pin 40 to your -drive cable connected sense line).


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